Design von CMOS-Phasenschleifen: Von der Schaltungsebene zur Architekturebene von B
129,93 €
It is a must-have textbook for engineers interested in learning about the subject, and a useful reference for experts.'. Ian Galton, University of California, San Diego. Using a modern, pedagogical approach, this textbook gives students and engineers a comprehensive and rigorous knowledge of CMOS phase-locked loop (PLL) design for a wide range of applications.
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